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Every Studyloaf post, newest first: exam guides and worked GATE ECE explainers. 59 posts in all.

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Why Can't Standard AM Put More Than a Third of Its Power in the Sidebands?

In standard AM the sideband share is μ² ÷ (2 + μ²), and μ can't pass 1 without distortion, so it tops out at 1/3. The derivation and a worked 10 V example.

GATE ECE•October 10, 2026•6 min read

How Does a Diode's Small-Signal Resistance Change With Bias Current?

A diode's small-signal resistance is rd = nVT ÷ ID: 258.5 Ω at 0.1 mA, 25.85 Ω at 1 mA, 2.585 Ω at 10 mA. The derivation, a worked example and when it fails.

GATE ECE•October 10, 2026•7 min read

ece gate engineering-fundamentals

Why Does the Early Effect Give a BJT a Finite Output Resistance?

Raising VCE narrows the base, so IC creeps up and the BJT's output resistance is ro ≈ VA ÷ IC. The physics, a worked 50 V example and the effect on gain.

GATE ECE•October 10, 2026•7 min read

ece gate engineering-fundamentals

Why Does a Fourier Series Overshoot by About 9% at a Jump, However Many Terms You Add?

The Gibbs overshoot: a square wave's partial sums peak near 1.179, about 9% of the jump, at any number of terms. Computed sums, a worked peak and the traps.

GATE ECE•October 10, 2026•7 min read

ece gate engineering-fundamentals

How Does a Hamming (7,4) Syndrome Point to the Flipped Bit?

Each Hamming parity bit checks the positions whose binary index has that bit set, so the syndrome spells out the flipped position. A worked (7,4) example.

GATE ECE•October 10, 2026•7 min read

ece gate engineering-fundamentals

What Do Students Get Wrong About Don't-Cares in K-Maps?

Don't-cares in a K-map are optional 1s, not compulsory ones. Four common mistakes, a worked example checked by brute force, and why minimal answers can differ.

GATE ECE•October 10, 2026•7 min read

ece gate engineering-fundamentals

How Much Does the Miller Effect Cut a Common-Emitter Amplifier's Bandwidth?

A 2 pF base-collector capacitance can act like 195 pF at a CE amplifier's input. A worked Miller effect example, the bandwidth it costs and how exact it is.

GATE ECE•October 10, 2026•8 min read

ece gate engineering-fundamentals

How Do You Apply the Nyquist Criterion When the Open Loop Has a Pole on the jω Axis?

Indent the Nyquist contour around the pole, then map the detour: it becomes an infinite arc closing clockwise. Worked K/(s(s+1)(s+2)) example, stable for K < 6.

GATE ECE•October 10, 2026•8 min read

ece gate engineering-fundamentals

Why Does an Op-Amp Integrator Saturate, and How Long Does It Take?

An ideal integrator has infinite DC gain, so any DC input ramps it into a rail: 0.5 V into 10 kΩ and 100 nF hits −12 V in 24 ms. The offset trap and the Rf fix.

GATE ECE•October 10, 2026•7 min read

ece gate engineering-fundamentals

What Do You Do When a Routh Array Has a Zero in the First Column?

A lone zero in the Routh first column gets an ε; a whole zero row needs an auxiliary polynomial. Worked examples checked against the real roots, and the traps.

GATE ECE•October 10, 2026•7 min read

ece gate engineering-fundamentals

Why Does Adding Resistance Lower Q in a Series RLC but Raise It in a Parallel One?

Series Q = ω0L/R falls as R rises; parallel Q = R/(ω0L) rises. Why, with one worked tank: L = 1 mH, C = 10 nF, Q = 31.6 at 10 Ω series or 10 kΩ in parallel.

GATE ECE•October 10, 2026•7 min read

ece gate engineering-fundamentals

How Do You Calculate Setup and Hold Slack for a Flip-Flop Path?

Setup slack uses the slowest path and the clock period; hold slack uses the fastest path and no period. A worked 5 ns example with skew gives 0.9 and 0.05 ns.

GATE ECE•October 10, 2026•7 min read

ece gate engineering-fundamentals